关键词triggered
标准
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图片 型号 厂商 标准 分类 描述
Image: 54ALS574 54ALS574 Texas Instruments octal D-type edge-triggered flip-flops with 3-state outputs
Image: HCS374MS_04 HCS374MS_04 Intersil Corporation radiation hardened octal D-type flip-flop, three-state, positive edge triggered
Image: HCS374MS HCS374MS Intersil Corporation radiation hardened octal D-type flip-flop, three-state, positive edge triggered
Image: N74F50728D N74F50728D NXP Semiconductors synchronizing cascaded dual positive edge-triggered D-type flip-flop
Image: N74F113N N74F113N NXP Semiconductors dual J-K negative edge-triggered flip-flops without reset
Image: N74F114D N74F114D NXP Semiconductors dual J-K negative edge-triggered flip-flop with common clock and reset
Image: N74F114N N74F114N NXP Semiconductors dual J-K negative edge-triggered flip-flop with common clock and reset
Image: IDT40LVC162374APV IDT40LVC162374APV Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT41LVC162374APF IDT41LVC162374APF Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT42LVC162374APA IDT42LVC162374APA Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT41LVC162374APV IDT41LVC162374APV Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT41LVC162374APA IDT41LVC162374APA Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT43LVC162374APA IDT43LVC162374APA Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT43LVC162374APF IDT43LVC162374APF Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT44LVC162374APV IDT44LVC162374APV Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT43LVC162374APV IDT43LVC162374APV Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: IDT45LVC162374APF IDT45LVC162374APF Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold
Image: N74F50729N N74F50729N NXP Semiconductors synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
Image: N74F50728N N74F50728N NXP Semiconductors synchronizing cascaded dual positive edge-triggered D-type flip-flop
Image: IDT45LVC162374APV IDT45LVC162374APV Integrated Device Technology 3.3V cmos 16-bit edge triggered D-type flip-flop with 3-state outputs, 5 volt tolerant I/O, bus-hold

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