| 图片 |
型号 |
厂商 |
标准 |
分类 |
描述 |
|
CY7C1170V18-300BZXC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1170V18-300BZXI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1170V18-333BZC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1170V18-333BZI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1170V18-333BZXC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1170V18-333BZXI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18 |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-300BZC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-300BZI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-300BZXC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-300BZXI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-333BZC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-333BZI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-333BZXC |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1177V18-333BZXI |
Cypress Semiconductor Corp |
|
|
18-mbit ddr-II+ sram 2-word burst architecture (2.5 cycle read latency) |
|
|
CY7C1241V18 |
Cypress Semiconductor Corp |
|
|
36-mbit qdr⑩-II+ sram 4-word burst architecture (2.0 cycle read latency) |
|
|
CY7C1241V18-300BZC |
Cypress Semiconductor Corp |
|
|
36-mbit qdr⑩-II+ sram 4-word burst architecture (2.0 cycle read latency) |
|
|
CY7C1241V18-300BZI |
Cypress Semiconductor Corp |
|
|
36-mbit qdr⑩-II+ sram 4-word burst architecture (2.0 cycle read latency) |
|
|
CY7C1241V18-300BZXC |
Cypress Semiconductor Corp |
|
|
36-mbit qdr⑩-II+ sram 4-word burst architecture (2.0 cycle read latency) |
|
|
CY7C1241V18-300BZXI |
Cypress Semiconductor Corp |
|
|
36-mbit qdr⑩-II+ sram 4-word burst architecture (2.0 cycle read latency) |
