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图片 型号 厂商 标准 分类 描述
Image: WCSN0436V1P-143AC WCSN0436V1P-143AC Weida Semiconductor, Inc. 128kx36 pipelined sram with nobl TM architecture
Image: WCSN0436V1P-166AC WCSN0436V1P-166AC Weida Semiconductor, Inc. 128kx36 pipelined sram with nobl TM architecture
Image: CY7C1163V18 CY7C1163V18 Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-333BZC CY7C1163V18-333BZC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-300BZXC CY7C1163V18-300BZXC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-333BZC CY7C1161V18-333BZC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-300BZI CY7C1161V18-300BZI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18 CY7C1161V18 Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-300BZXC CY7C1161V18-300BZXC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-333BZI CY7C1161V18-333BZI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-300BZC CY7C1161V18-300BZC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-333BZXC CY7C1161V18-333BZXC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-333BZXI CY7C1161V18-333BZXI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1161V18-300BZXI CY7C1161V18-300BZXI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C11631KV18 CY7C11631KV18 Cypress Semiconductor Corp 18-mbit qdr? II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-333BZI CY7C1163V18-333BZI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-300BZI CY7C1163V18-300BZI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-300BZXI CY7C1163V18-300BZXI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-333BZXI CY7C1163V18-333BZXI Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)
Image: CY7C1163V18-333BZXC CY7C1163V18-333BZXC Cypress Semiconductor Corp 18-mbit qdr?-II+ sram 4-word burst architecture (2.5 cycle read latency)

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