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TMS320C6201GJLA200的详细信息
Manufacturer: | Texas Instruments |
---|---|
Product Category: | Digital Signal Processors & Controllers - DSP, DSC |
RoHS: | No |
Brand: | Texas Instruments |
Data Bus Width: | 16 bit |
Data RAM Size: | 128 kB |
Maximum Clock Frequency: | 200 MHz |
MIPS: | 1600 MIPs |
Operating Supply Voltage: | 1.8 V, 3.3 V |
Maximum Operating Temperature: | + 105 C |
Package / Case: | FCBGA-352 |
Mounting Style: | SMD/SMT |
Instruction Type: | Fixed Point |
Minimum Operating Temperature: | - 40 C |
Packaging: | Tube |
Product: | DSPs |
Series: | TMS320C6201 |
Factory Pack Quantity: | 40 |
Tradename: | C6000 |
Unit Weight: | 4.367 g |
TMS320C6201GJLA200相关文档
- Reference Design: TMS320C6000 CPU and Instruction Set Reference Guide (Rev. G)
- Reference Design: TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C)
- Function Diagram: fbd_sprs051h
TMS320C6201GJLA200应用笔记
- TMS320C6000 u-Law and a-Law Companding with Software or the McBSP
- TMS320C6000 McBSP: IOM-2 Interface (Rev. A)
- TMS320C6000 DMA Example Applications (Rev. A)
- TMS320C6000 System Clock Circuit Example (Rev. A)
- General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point
- TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C)
- Thermal Considerations for the DM64xx, DM64x, and C6000 Devices
- TMS320C6201 (Revision 2.x) to TMS320C6201B (Revision 3.X) (Rev. A)
- TMS320C6000 Memory Test (Rev. A)
- TMS320C62x/67x Power Supply Solutions for 1-2 DSPs Using the TL5001A and TPS7133 (Rev. A)
- TMS320C6000 Host Port to MPC860 Interface (Rev. A)
- Using a TMS320C6000 McBSP for Data Packing (Rev. A)
- TMS320C6000 C Compiler: C Implementation of Intrinsics
- TMS320C6000 McBSP as a TDM Highway (Rev. A)
- TMS320C6000 McBSP: Interface to SPI ROM (Rev. C)
- GSM Enhanced Full Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)
- G.723.1 Dual Rate Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)
- ETSI Math Operations in C for the TMS320C62x (Rev. A)
- TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B)
- IS-127 Enhanced Var Rate Speech Coder:Multichannel TMS320C62x Implementation (Rev. B)
- TMS320C6000 Board Design: Considerations for Debug (Rev. C)
- Software Development Techniques for the TMS320C6201 DSP
- TMS320C6000 McBSP Initialization (Rev. C)
- TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D)
- Using TI FIFOs to Interface High-Speed Data Converters With TI TMS320 DSPs
- TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A)
- TMS320C6000 Host Port to MC68360 Interface (Rev. A)
- MPEG-2 Video Decoder: TMS320C62x (TM) DSP Implementation
- TMS320C6201/6701 EVM: TMS320C6000 McBSP to Multimedia Audio Codec (Rev. A)
- Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A)
- Setting Up TMS320C6201 Interrupts in C
- TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A)
- TPS5625 Working with TMS320C6201 Applications
- TMS320C6000 Board Design for JTAG (Rev. C)
- TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A)
- TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E)
- TMS320C620x/C642x McBSP: UART (Rev. C)
- Extended Precision Radix-4 Fast Fourier Transform Implemented on the TMS320C62x
- Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A)
- Circular Buffering on TMS320C6000 (Rev. A)
- TMS320C6000 McBSP: I2S Interface
- G.729/A Speech Coder: Multichannel TMS320C62x Implementation (Rev. B)
- TMS320C6000 EMIF to External Flash Memory (Rev. A)
- On the Implementation of MPEG-4 Motion Compensation Using the TMS320C62x
- TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A)
- Using IBIS Models for Timing Analysis (Rev. A)
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