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MC10EP89MNR4G的详细信息
Manufacturer: | ON Semiconductor |
---|---|
Product Category: | Clock Buffer |
RoHS: | Yes |
Brand: | ON Semiconductor |
Number of Outputs: | 4 |
Max Input Freq: | 2000 MHz |
Propagation Delay - Max: | 0.37 ns |
Supply Voltage - Max: | +/- 5 V |
Supply Voltage - Min: | +/- 3 V |
Maximum Operating Temperature: | + 85 C |
Minimum Operating Temperature: | - 40 C |
Package / Case: | DFN-8 EP |
Packaging: | Reel |
Mounting Style: | SMD/SMT |
Series: | MC10EP89 |
Factory Pack Quantity: | 1000 |
MC10EP89MNR4G相关文档
- Application Note: Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks
- Simulation Model: IBIS Model for MC10EP89D for VEE -3.3 V
- Simulation Model: IBIS Model for MC10EP89D for VCC 5.0 V
- Simulation Model: IBIS Model for MC10EP89D for VEE -5.2 V
- Application Note: Termination of ECL Logic Devices
- Package Drawing: SOIC-8 Narrow Body
- Simulation Model: IBIS Model for MC10EP89D for VCC 3.3 V
- Application Note: The ECL Translator Guide
- Application Note: Storage and Handling of Drypack Surface Mount Device
- Package Drawing: TSSOP 8 3.0x3.0x0.95 mm
- Application Note: Thermal Analysis and Reliability of WIRE BONDED ECL
- Application Note: AC Characteristics of ECL Devices
- Application Note: Designing with PECL (ECL at +5.0 V)
- Application Note: ECLinPS Plus™ Spice Modeling Kit
- Application Note: ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information Guide
- Application Note: Using Wire-OR Ties in ECLInPS Designs
- Application Note: Interfacing with ECLinPS™
- Package Drawing: DFN8 2.0x2.0x0.9mm, 0.5p
- Application Note: Clock Generation and Clock and Data Marking and Ordering Information Guide
- Application Note: Phase Lock Loop General Operations
- Application Note: ECL Clock Distribution Techniques
- Application Note: Metastability and the ECLinPS Family
- Application Note: Interfacing Between LVDS and ECL
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