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ON Semiconductor 
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MC10EP51MNR4G的详细信息
| Manufacturer： | ON Semiconductor |
|---|---|
| Product Category： | Flip Flops |
| RoHS： | Yes |
| Brand： | ON Semiconductor |
| Number of Circuits： | 1 |
| Logic Family： | ECL |
| Logic Type： | ECL |
| Polarity： | Inverting/Non-Inverting |
| Input Type： | Single-Ended |
| Output Type： | Differential |
| Propagation Delay Time： | 0.37 ns |
| High Level Output Current： | - 50 mA |
| Low Level Output Current： | 50 mA |
| Supply Voltage - Max： | - 5.5 V, 5.5 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | DFN EP |
| Packaging： | Reel |
| Minimum Operating Temperature： | - 40 C |
| Number of Input Lines： | 1 |
| Number of Output Lines： | 1 |
| Series： | MC10EP51 |
| Factory Pack Quantity： | 1000 |
| Supply Voltage - Min： | - 3 V or 3 V |
MC10EP51MNR4G相关文档
- Application Note: Thermal Analysis and Reliability of WIRE BONDED ECL
- Application Note: Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks
- Application Note: Clock Generation and Clock and Data Marking and Ordering Information Guide
- Simulation Model: IBIS Model for MC10EP51DT 3.3V
- Application Note: Phase Lock Loop General Operations
- Application Note: Termination of ECL Logic Devices
- Application Note: ECLinPS Plus™ Spice Modeling Kit
- Application Note: Metastability and the ECLinPS Family
- Application Note: ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information Guide
- Package Drawing: TSSOP 8 3.0x3.0x0.95 mm
- Package Drawing: SOIC-8 Narrow Body
- Application Note: The ECL Translator Guide
- Application Note: ECL Clock Distribution Techniques
- Application Note: AC Characteristics of ECL Devices
- Application Note: Interfacing with ECLinPS™
- Application Note: Storage and Handling of Drypack Surface Mount Device
- Application Note: Interfacing Between LVDS and ECL
- Application Note: Using Wire-OR Ties in ECLInPS Designs
- Package Drawing: DFN8 2.0x2.0x0.9mm, 0.5p
- Application Note: Designing with PECL (ECL at +5.0 V)
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