 |
ON Semiconductor 
Datasheet下载地址
| 本地下载 >> 厂商下载2 >> 第三方平台下载 >> |
MC10EP08DTG的详细信息
| Manufacturer： | ON Semiconductor |
|---|---|
| Product Category： | Logic Gates |
| RoHS： | Yes |
| Brand： | ON Semiconductor |
| Product： | MUX Gates |
| Logic Family： | ECL |
| Number of Gates： | 1 |
| Number of Input Lines： | 4 |
| Number of Output Lines： | 2 |
| High Level Output Current： | - 50 mA |
| Low Level Output Current： | 50 mA |
| Propagation Delay Time： | 0.3 ns |
| Supply Voltage - Max： | +/- 5.5 V |
| Supply Voltage - Min： | +/- 3 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | TSSOP-8 |
| Packaging： | Tube |
| Minimum Operating Temperature： | - 40 C |
| Number of Lines In/Out： | 4 / 2 |
| Series： | MC10EP08 |
| Factory Pack Quantity： | 100 |
MC10EP08DTG相关文档
- Application Note: Clock Generation and Clock and Data Marking and Ordering Information Guide
- Application Note: ECLinPS Plus™ Spice Modeling Kit
- Simulation Model: IBIS Model for mc10ep08d 5.0V
- Application Note: AC Characteristics of ECL Devices
- Application Note: Designing with PECL (ECL at +5.0 V)
- Simulation Model: IBIS Model for mc10ep08d -5.0V
- Simulation Model: IBIS Model for mc10ep08d -3.3V
- Simulation Model: IBIS Model for mc10ep08d 3.3V
- Application Note: ECL Clock Distribution Techniques
- Application Note: Metastability and the ECLinPS Family
- Package Drawing: SOIC-8 Narrow Body
- Application Note: The ECL Translator Guide
- Application Note: Interfacing with ECLinPS™
- Application Note: Interfacing Between LVDS and ECL
- Package Drawing: TSSOP 8 3.0x3.0x0.95 mm
- Application Note: Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks
- Application Note: Termination of ECL Logic Devices
扫码手机查看更方便
同类器件
