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ON Semiconductor 
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MC100EPT25DTG的详细信息
| Manufacturer： | ON Semiconductor |
|---|---|
| Product Category： | Translation - Voltage Levels |
| RoHS： | Yes |
| Brand： | ON Semiconductor |
| Type： | ECL/LVECL to LVTTL |
| Propagation Delay Time： | 1.6 ns |
| Supply Voltage - Max： | - 5.5 V, + 3.6 V |
| Supply Voltage - Min： | - 3 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | TSSOP-8 |
| Minimum Operating Temperature： | - 40 C |
| Packaging： | Tube |
| Series： | MC100EPT25 |
| Factory Pack Quantity： | 100 |
| Part # Aliases： | MC100EPT25DG |
MC100EPT25DTG相关文档
- Package Drawing: SOIC-8 Narrow Body
- Application Note: Termination of ECL Logic Devices
- Application Note: Phase Lock Loop General Operations
- Package Drawing: TSSOP 8 3.0x3.0x0.95 mm
- Package Drawing: DFN8 2.0x2.0x0.9mm, 0.5p
- Application Note: Thermal Analysis and Reliability of WIRE BONDED ECL
- Application Note: Clock Generation and Clock and Data Marking and Ordering Information Guide
- Application Note: Storage and Handling of Drypack Surface Mount Device
- Application Note: AC Characteristics of ECL Devices
- Application Note: ECLinPS, ECLinPS Lite, ECLinPS Plus and GigaComm Marking and Ordering Information Guide
- Simulation Model: IBIS Model for MC100EPT25D VEE@-5.2V
- Simulation Model: IBIS Model for MC100EPT25D VEE -3.3V
- Application Note: Interfacing Between LVDS and ECL
- Application Note: ECL Clock Distribution Techniques
- Application Note: Clock Management Design Using Low Skew and Low Jitter Devices
- Application Note: Designing with PECL (ECL at +5.0 V)
- Application Note: Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks
- Application Note: The ECL Translator Guide
- Simulation Model: EPT21/23/25 ECLinPS PlusE Translator TTL output SPICE Modeling Kit
- Application Note: Interfacing with ECLinPS™
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