 |
Texas Instruments 
Datasheet下载地址
| 本地下载 >> 厂商下载2 >> 第三方平台下载 >> |
ADS62C15IRGCTG4的详细信息
| Manufacturer： | Texas Instruments |
|---|---|
| Product Category： | Analog to Digital Converters - ADC |
| RoHS： | Yes |
| Number of Channels： | 2 Channel |
| Brand： | Texas Instruments |
| Architecture： | Pipeline |
| Conversion Rate： | 125 MS/s |
| Resolution： | 11 bit |
| Input Type： | Differential |
| Interface Type： | LVDS, Parallel |
| Operating Supply Voltage： | 1.65 V to 3.6 V, 3 V to 3.6 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | VQFN-64 |
| Development Kit： | ADS62C15EVM |
| Maximum Power Dissipation： | 1225 mW |
| Minimum Operating Temperature： | - 40 C |
| Number of Converters： | 2 |
| Packaging： | Reel |
| Series： | ADS62C15 |
| SNR： | 67.2 dB |
| Factory Pack Quantity： | 250 |
| Voltage Reference： | Internal, External |
| Unit Weight： | 209.300 mg |
ADS62C15IRGCTG4相关文档
- PCN: Conversion to smaller reel (13" to 7") and associated packing materials on Selected QFN Devices currently shipped in 13 reels
- SPICE Model: ADS62Pxx Family TINA-TI Transient Spice Model
- Evaluation Kits: Low Cost Data Capture Card
- Evaluation Kits: ADS62C15 Evaluation Module
- Evaluation Kits: High Speed Data Capture and Pattern Generation Platform
- Evaluation Kits: ADS62P15 Evaluation Module
- Evaluation Kits: TSW2200EVM: Low Cost Portable Power Supply
- TINA Reference Design: ADS62Pxx Family TINA-TI Transient Reference Design
- Evaluation Kits: ADS62C17 Evaluation Module
- Function Diagram: fbd_slas577e
- PCN: Add Cu as Alternative Wire Base Metal for Selected Device(s)
ADS62C15IRGCTG4应用笔记
- What Designers Should Know About Data Converter Drift
- Interleaving Analog-to-Digital Converters
- Analog-to-Digital Converter Grounding Practices Affect System Performance
- CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
- Shelf-Life Evaluation of Lead-Free Component Finishes
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat
- QFN Layout Guidelines
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
- CDCE62005 as Clock Solution for High-Speed ADCs
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
- Understanding Low-Amplitude Behavior of 11-bit ADCs
- Principles of Data Acquisition and Conversion
- Band-Pass Filter Design Techniques for High-Speed ADCs
- Driving High-Speed ADCs: Circuit Topologies and System-Level Parameter (Rev. A)
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
扫码手机查看更方便
同类器件
